1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and a method for mounting a semiconductor device and, more particularly, to a method for manufacturing a semiconductor device which has protruding electrodes such as a solder bump and a method for mounting such a semiconductor device to a mount board or circuit board.
2. Description of the Related Art
In order to achieve a high-speed operation of a computer, it is required to decrease a propagation delay in signal transmission. The path for transmitting signals includes a path provided inside a semiconductor element and a path provided outside the semiconductor element. Recently, a high-speed operation of signal transmission in the semiconductor element has been achieved. Thus, it is desired to decrease a propagation delay of signals generated in connecting parts provided outside semiconductor elements and a propagation delay generated in wiring parts of a mount board to which the semiconductor elements are mounted.
A flip chip bonding reduces the propagation delay of signals. In the flip chip bonding, a bump such as a solder bump, a gold bump or a conductive material bump is used for bonding a semiconductor element to a mount board or circuit board. Accordingly, the length of a wiring portion between the semiconductor device and the mount board is reduced, resulting in a reduction in the entire length of the wiring parts. Thus, the propagation delay of signals can be reduced since the delay of signals in the wiring parts is proportional to the length of the wire parts.
In order to achieve the flip chip bonding, solder bumps, for example, must be formed on at least one of the semiconductor element and the mount board. As a method for forming the solder bumps, a solder paste printing method, a solder ball method, a vapor deposition method, a transfer method and an electroplating method are known.
The vapor deposition method, the transfer method and the electroplating method have superiority in forming many fine bumps. For example, solder bumps can be formed on the electrodes of a semiconductor element by plating a solder material. The solder bumps thus formed are aligned with corresponding electrodes of a mounting board, and then the solder bumps are melted to bond the semiconductor element to the mounting board.
One of the problems of the flip chip bonding is a decrease in the strength of the soldered portion due to presence of a void in the soldered portion. Such void may expand during a mounting process of the semiconductor element to the mount board which may result in fracture of the soldered portion. The cause of formation of the void may be a gas being trapped in an area between the electrode and the solder in which area the electrode is insufficiently wet by the molten solder.
Conventionally, several methods have been suggested to eliminate a void in the soldered portion as mentioned below.
Japanese Laid-Open Patent Application No.61-75531 discloses a method in which a soldering operation is performed while a surface on which a solder is provided is slanted so that the soldering operation is progressed while a gas is pressed out by the flow of solder. However, this method is not applicable to fine bumps.
Japanese Laid-Open Patent Applications No.63-90160, No.3-82146 and No.6-275733 disclose a method for providing a passage (a through hole) through which a gas in a void can escape. Additionally, Japanese Laid-Open Patent Applications No.63-130258 and No.6-285622 disclose a method in which an oxidation layer of the solder is broken so as to prevent generation of a void. However, these methods are also not applicable to fine bumps.
Additionally, Japanese Laid-Open Patent Application No.3-208346 discloses a method for removing a gas in a void by sticking a needle into the solder. However, this method is not practical for fine bumps formed on a chip having a few thousands of terminals.
Further, Japanese Laid-Open Patent Application No.4-360557 discloses a method for soldering in a sealed manner which is not applicable to a fine solder bump. Japanese Laid-Open Patent Application No.5-226386 discloses a method for soldering while swinging which is not applicable to fine solder bumps provided with a fine pitch. Japanese Laid-Open Patent Application No.7-22744 discloses a method for pressing gas by applying a pressure to the solder. However, it is difficult in practice to apply a pressure to a fine bump.
In order to eliminate a void without the above-mentioned problems, Japanese Laid-Open Patent Applications No.63-226031, No.63-304655, No.2-79453, No.1-278959, No.3-91254 and No.6-69387 suggest a method for bonding without a void by using adhesive material. In this method, the adhesive material is provided to encircle a surface to be bonded. The adhesive material is rendered to be flowable under a low-pressure condition. Then, a high pressure is applied so as to flow the adhesive material inwardly and solidify the adhesive material.
In order to apply the above-mentioned method to a solder bump, the solder must be formed in a shape which encircles an electrode. However, it is difficult in practice to form the solder in such a shape to encircle a fine electrode having a diameter of a few tens of micrometers. Additionally, when a pitch is a few tens to a few hundreds of micrometers, there is a problem in that there is a high probability of short-circuiting adjacent electrodes.
As mentioned above, there is no publicly known method which is practically effective to reduce formation of voids in a solder bump. Accordingly, in a practical manufacturing process of a semiconductor device, a gas evacuation of a solder bump is performed in a relatively simple manner such as annealing in a vacuum condition or in an inert gas atmosphere, although it is recognized that such a method is not sufficient.
Another problem raised by the flip chip bonding is that a defective soldering occurs in a mounting process for mounting a semiconductor element to a mount board when an oxidation layer is present on a surface of a solder bump. Accordingly, the oxidation layer must be removed before a mounting process is performed. However, it is difficult to remove the oxidation layer under the vacuum condition or the inert gas atmosphere.
A further problem raised by the flip chip bonding is in that it is possible to lose an electrical contact between a solder and an electrode. That is, diffusion of solder material in the electrode may weaken the electrodes. Additionally, a fracture may occur in a metal compound formed by reaction of a solder material and an electrode material which metal compound is hard and brittle. Accordingly, a metal layer must be formed between the solder and the electrode so as to prevent diffusion of the solder material.